本文来自微信公众号:半导体行业观察 (ID:icbank),作者:L晨光,题图来自:AI生成
EUV lithography machine battle, sudden change in situation
Observation of the Semiconductor Industry
This article is from WeChat official account: Semiconductor Industry Watch (ID: icbank), written by L Chenguang, and the title is from AI Generation
Starting from early deep ultraviolet (DUV) lithography machines, their stable and reliable performance laid a solid foundation for the development of the semiconductor industry; Later on, extreme ultraviolet (EUV) lithography machines, with their unique extreme ultraviolet light source and shorter wavelength, successfully pushed lithography accuracy to new heights; Nowadays, the High NA lithography machine has officially entered the historical stage, further improving the accuracy and efficiency of lithography, providing the possibility for manufacturing smaller and more precise chips.
Especially with the advent of the ASML High NA EUV lithography machine, which is currently the world's most advanced chip manufacturing equipment, the transistor density and performance of chips have been significantly improved, which is crucial for achieving large-scale production of advanced processes below 2nm.
In this situation, major wafer manufacturers such as Intel, TSMC, Samsung, and SK Hynix are waiting for the opportunity to introduce or announce the progress of the High NA EUV lithography machine market, indicating that the semiconductor industry will usher in a new round of technological innovation and competition.
1、 Intel: Misfortune
Among semiconductor giants, Intel was the first to order the new High NA EUV equipment EXE: 5000 from ASML.
As early as December 2023, Intel acquired the world's first High NA EUV lithography machine and announced in April this year that it had completed the assembly of the world's first commercial High NA (0.55NA) EUV lithography machine at its Fab D1X R&D wafer fab in Hillsborough, Oregon, USA. It has now entered the optical system calibration phase and plans to use it on its 18A (1.8nm) and 14A (1.4nm) nodes.
In August of this year, Intel announced the successful receipt of the world's second High NA EUV lithography machine worth $383 million, which has been successfully installed and debugged at its wafer fab in Oregon.
ASML had previously stated that the current production capacity of 2nm lithography machines is only 10 units, and it is expected to produce 20 units per year by 2028. It is worth noting that among these 10 latest lithography equipment, public information shows that 6 have been acquired by Intel.
It can be seen that Intel has achieved a leading advantage in the import progress of the most advanced lithography machines.
As the saying goes, 'Learn from a setback, gain wisdom.' The reason why Intel is so actively choosing High NA EUV equipment is actually largely due to its previous decline in EUV technology.
1. Tick Lock mode collapses and misses the EUV technology window
As is well known, Intel has been cooperating with ASML for decades, promoting the development of lithography technology from 193nm immersion lithography to EUV. However, due to cost considerations, the then CEO of Intel was unwilling to use the expensive ASML EUV lithography machine and chose not to use this technology in its 10nm process, but instead used a DUV lithography machine for quadruple patterning. As a result, Intel encountered numerous difficulties in yield.
Looking back at history, it can be seen that in 2011, Intel launched the 22nm FinFET process, far surpassing TSMC and Samsung's 28nm at the time, and its technological advantage can be said to be far ahead. However, starting from the 14nm node, Intel suffered consecutive heavy losses.
In 2014, both Intel and Samsung achieved the production of 14nm process chips, but by 2017, TSMC had advanced to 10nm and 7nm processes. However, Intel was unwilling to adopt the latest EUV lithography technology, which led to its original plan to mass produce 10nm chips in 2016 until 2019, two and a half years later than TSMC's launch time. Its 7nm chips were not launched until 2022.
In fact, apart from failing to grasp EUV technology, the decline of Intel's foundry industry is also closely related to its "Tick Lock" strategy.
Former Intel CEO Paul Otellini proposed the "Tick Lock" strategy for chip manufacturing, which involves updating manufacturing processes in Tick year (process year) and microarchitecture in Tock year (architecture year), equivalent to making process progress every two years. However, during the same period, in order to implement "efficient management" and "cost saving plans", Intel laid off 20000 employees, and a large number of engineers involved in the research and development of next-generation chip processes and architectures were laid off, making it difficult to sustain the "Tick Lock" mode. The launch of 14nm chips was delayed by one year, and 10nm chips were delayed several times.
Intel made small annual updates to chip technology like squeezing toothpaste, and in those years it was once ridiculed as a "toothpaste factory".
With the collapse of Tick Lock mode and missing out on the early EUV technology window, Intel is gradually falling behind.
At the same time, TSMC and Samsung have purchased EUV equipment in large quantities from ASML, continuously reducing the process size of chips, improving their efficiency and performance, and greatly enhancing their competitiveness in the field of wafer foundry. Intel is far behind TSMC and Samsung in advanced manufacturing processes.
More seriously, outdated production processes and declining product competitiveness not only affect Intel's OEM business, but also continuously erode its market share in desktop and server chips.
It can be said that one pull can move the whole body.
2、 Intel saves itself, where is the way forward?
Therefore, after learning from the pain, Intel took the lead in launching an attack on the High NA EUV lithography machine, attempting to catch up with the gap that had been widened.
As mentioned above, in April 2024, a massive equipment weighing 150 tons was installed at Intel's research facility in Oregon, USA.
After Intel CEO Pat Gelsinger proposed the "IDM 2.0" strategy, he quickly refocused on improving cutting-edge process technology and proposed a plan of four years and five process nodes, hoping to catch up and surpass TSMC's 2nm process with Intel 18A by 2025.
At the same time, Intel hopes to achieve sustained leadership over competitors such as TSMC by being the first to adopt High NA EUV lithography machines. Intel's goal is to achieve mass production of Intel 14A process technology between 2026 and 2027, and further enhance process technology based on this. By 2030, we aim to achieve a balanced operating profit margin for Intel's foundry business and become the world's second-largest wafer foundry.
Guided by its goals, Intel is continuously strengthening its foundry infrastructure and plans to invest $100 billion over the next five years to expand its advanced chip manufacturing capabilities. At the same time, approximately 30 billion euros will be invested to build two semiconductor factories in Magdeburg, Germany. These investment plans will significantly enhance Intel's chip foundry capabilities.
However, the strategic vision is beautiful, but the reality is cruel.
Despite Intel's ambitious goals, due to significant investments in four years, five milestones, route evolution, ecosystem building, and capacity expansion, Intel disclosed that its foundry business revenue decreased by 31.2% year-on-year to $18.9 billion last year, with an operating loss of $7 billion, an increase of 34.6% year-on-year.
2024 is likely to be the year with the most severe operating losses for Intel's chip manufacturing business. This year's Q1 financial report shows that the business is operating at a loss of $2.5 billion, almost twice that of the previous quarter; The Q2 loss reached 2.83 billion US dollars, and the OEM loss continued to expand.
According to research firm TrendForce, Intel did not make it into the top 10 global wafer foundries in terms of revenue in the second quarter of 2024. In the past few years, Intel briefly made the list in the third quarter of 2023, with a market share of only 1%.
This means that IFS has not been able to truly support Intel's goal of reshaping its industry position with cutting-edge chip manufacturing in the past three years, and as the only domestic company in the United States capable of taking on the role of cutting-edge foundry industry, Intel is also unable to shoulder the responsibility of the times.
According to Mind Watch, Jay Goldberg, President of D2D Advisory, a US semiconductor consulting firm, specifically pointed out that "the real challenge facing Intel's foundry industry is that they must have more customers in their economic model to support the research and development needed to continuously advance their manufacturing processes. They must increase external customer demand and double their revenue scale to support continuing to move forward on the track of Moore's Law
It is not difficult to see that Intel is currently in a dilemma, with its performance continuing to decline. In 2024, it may even turn from profit to loss, with its stock price plummeting by nearly 60% and its market value falling below $100 billion several times, making it one of the worst performing technology stocks in the S&P 500 index.
Faced with the crisis, Intel stated in an internal letter that it will further separate its chip manufacturing and design businesses, as part of a series of new measures to address one of the most severe crises in its 50 year history.
According to Intel's previously released forecast data, the spin off of wafer manufacturing business can save $3 billion in costs by 2023 and $8-10 billion in costs by 2025. At the same time, the plans to build factories in Germany and Poland have been postponed for 2 years; The construction of the factory in Malaysia will be completed, but the official opening time will depend on market conditions and capacity utilization.
While Intel continues to urgently execute the plan announced last month, it is also working to prudently manage its existing cash to meaningfully improve its balance sheet and liquidity. This includes selling a portion of Altera's shares and promoting its independent IPO; In terms of product development strategy, we also plan to simplify the x86 product portfolio. This is also a plan that Intel has publicly discussed multiple times.
In August of this year, it was even revealed that Intel was considering splitting its products and outsourcing business. It is worth mentioning that after rumors or spin offs of its wafer business, Intel's stock price rebounded by more than 9%, indicating how disappointed investors are with its chip foundry business.
Intel, which is in a low point, is a microcosm of the US chip manufacturing industry. Costs, technology, resources, IDM identity, and other factors are all constraining Intel's ambitious chip foundry plans. However, despite the possibility of abandoning chip outsourcing in the industry and the continuous losses in the chip outsourcing business that have dissatisfied the capital market, this is also one of the few key layouts that can save Intel from fire and water.
Intel has no choice but to seize any possibility and grit its teeth.
Therefore, Intel needs the most advanced High NA EUV lithography machine as a production and marketing tool to demonstrate its R&D and manufacturing capabilities below 3nm and attempt to expand its customer base. However, as a new machine, the High NA EUV lithography machine has forced Intel to bear the pressure of equipment depreciation and production amortization costs to quell external doubts.
From the sustained competition in the industry and the "heavy asset, long cycle" nature of chip manufacturing, Intel still has many tough battles to fight. Especially in the context of Intel embarking on the largest transformation in company history to save itself.
Intel has also had experiences of recovering from difficulties in the past. In the 1980s, under the attack of Japanese companies, Intel withdrew from DRAM and focused its operating resources on CPUs, sweeping the personal computer market.
As Kissinger said, "This is Intel's most important transformation in over forty years. We haven't tried anything so important since transitioning from memory to microprocessors. We succeeded at the time, and we will embrace this moment and build a stronger Intel in the coming decades
But Intel's various self-help measures still need time to be tested.
3、 Samsung Electronics, shrouded in the shadow of OEM manufacturing
In August of this year, at the "2024 Lithography+Pattern Academic Conference", Samsung Electronics stated that in order to maintain competitiveness in the "chip war" with global semiconductor competitors such as Intel and TSMC, the company is actively participating in technology development. The company will introduce its first High NA EUV equipment "EXE: 5000" between the end of 2024 and the first quarter of 2025, and is expected to achieve full commercialization of this technology by 2027.
It is reported that the device may be placed at the Semiconductor Research Institute (NRD) located in the Huacheng Park, and is expected to be used for foundry business to further enhance its competitive advantage in the advanced node field.
In fact, Samsung chip foundry had an absolute advantage in the early years. When Steve Jobs released the first generation iPhone in 2007, he used ARM architecture chips purchased from Samsung. The A4, A5, A6, and A7 chips that were later installed on the iPhone 4, iPhone 4s, iPhone 5, and iPhone 5s/5c were all manufactured by Samsung, and at that time there was no TSMC involved.
Until 2011, Samsung had a competitive relationship with Apple in the smartphone market because it was also engaged in the research and sales of mobile phone chips and terminals. Both sides struggled with each other until a settlement was reached in June 2018.
During this process, Apple also initiated the process of "de Samsung". The A8 chip launched in 2014 was entirely manufactured by TSMC. TSMC successfully snatched Apple's order from Samsung, partly because Apple was eager to find alternative contract manufacturers, creating great opportunities for TSMC. On the other hand, TSMC has made significant breakthroughs in the 20nm process, resulting in a significant increase in yield rate. However, Samsung's 20nm process suddenly fell short, and the key issue has been unresolved, with yield rate not meeting Apple's requirements. It is precisely this favorable timing and location that has enabled TSMC to successfully hold onto the thigh of Apple.
On the other hand, Samsung, after its major clients were robbed, decided not to pursue 20nm and chose to directly jump from 28nm to 14nm, which formed a backlash against TSMC's 16nm. So, in the 2015 A9 chip, Apple redistributed some orders to Samsung, resulting in two versions: TSMC OEM and Samsung OEM. In theory, Samsung's 14nm performance should be better than TSMC's 16nm, but consumers' reputation is completely opposite, and many people are worried about buying Samsung's OEM version.
This defeat has caused Samsung to completely lose Apple's OEM orders. Apple's subsequent chips are all manufactured by TSMC, and the manufacturing process has steadily increased from 16nm in 2015 to 4nm.
At the same time, Qualcomm almost fell behind in Samsung's OEM, and Snapdragon 8+Gen1 urgently switched to TSMC's 4nm OEM, which forcibly regained Qualcomm's reputation and market position.
On the chip foundry track, Samsung had a starting advantage, but unfortunately, it was only after multiple consecutive failures in the mid-term that TSMC gradually achieved a comeback and today's significant lead. However, Samsung is also aware of the technological gap between itself and TSMC, so in order to surpass TSMC, it must come up with a stronger "trump card".
So, Samsung almost placed all its hopes of catching up with TSMC on the 3nm process. In 2023, Samsung will be the first to launch a 3nm process technology, using more advanced GAA (Surrounding Gate Transistor) technology, leading TSMC's FinFET technology.
It can be said that 3nm is equivalent to Samsung's final "last ditch battle". If they can catch up with TSMC in one fell swoop, there may be a chance to form a situation of dual dominance in the future.
However, from the perspective of market progress, Samsung's 3nm process faces challenges in yield, which has led to an awkward situation where Samsung's 3nm chips, although launched earlier than TSMC, have much higher costs and performance gaps. It is reported that the yield rate of Samsung's second-generation 3nm process technology is unstable, and the yield rate of their own Exynos 2500 is less than 20%. The Samsung Galaxy 25 series smartphones are all equipped with Snapdragon 8Gen4 processors and have abandoned the self-developed Exynos 2500 version due to significant differences in user experience.
After the gap with TSMC widened, fewer and fewer customers placed orders with Samsung.
In the past, Qualcomm's advanced process chips were exclusively manufactured by Samsung. As a result, after the 5nm chip, Qualcomm also handed over orders for advanced process chips to TSMC; Nowadays, Apple's A17 and A18 series chips are all manufactured using TSMC's 3nm process; Qualcomm's 3nm chips and MediaTek's Dimensity 9400 are all manufactured by TSMC; Even Nvidia, AMD, and Tesla's 3nm chips are manufactured by TSMC, and now Intel's orders have also been given to TSMC.
In chip manufacturing, TSMC alone holds over 60% of the global market share, with almost 100% of the market share in 3nm chip manufacturing and 90% of the market share in chip manufacturing below 7nm. The market share of Samsung, the second largest wafer fab, is only 11.5%.
According to the Chosun Ilbo, Samsung has shut down 30% of its 4nm, 5nm, and 7nm production lines at Plant 2 and Plant 3 in Pyeongtaek. It is expected that by the end of 2024, production capacity will continue to be shut down until 50%. This measure is clearly aimed at addressing the current situation where global tech giants such as NVIDIA, AMD, and Qualcomm have failed to provide Samsung Electronics with large-scale orders.
Industry experts emphasize that once a device is shut down, restoring normal operation is a lengthy process. Usually, even during periods of low demand, companies will lower their utilization rates instead of shutting down completely. However, the fact that nearly 30% of Samsung's advanced process equipment is idle is unprecedented.
In the third quarter of 2024, Samsung's non memory division, including wafer foundry and system LSI, incurred losses exceeding KRW 1 trillion. In addition, the yield of Samsung's 3nm process has remained low and has not been adopted by major customers. Recently, the production time of the advanced foundry wafer factory in Taylor, Texas, has been postponed to 2026.
Overall, this gap has completely shattered Samsung's dream of surpassing TSMC in the 3nm era.
Therefore, the news of Samsung introducing the High NA EUV lithography machine means that it will compete more fiercely with Intel and TSMC in the next generation of lithography technology.
Samsung plans to mass produce 2nm processes by 2025 and gradually expand to other application areas. For example, it will first be used in the field of action in 2025, expanded to HPC applications in 2026, and then expanded to the automotive industry in 2027. Samsung's 2nm process nodes adopt optimized backside power supply network technology to reduce interference from power supply circuits to signal circuits.
This development marks Samsung's first foray into High NA EUV technology. Previously, Samsung Electronics had collaborated with IMEC on circuit processing research. Samsung plans to accelerate the development of advanced nodes using its own devices and has set a goal of commercializing 1.4nm processes by 2027, which may pave the way for 1nm production.
In addition, in order to achieve comprehensive commercialization, Samsung is actively building related ecosystems.
It is reported that Samsung Electronics has purchased Laser Technologies' High NA EUV mask inspection equipment "Actis (ACTIS) A300". It is expected that ASML's EXE: 5000 installation will be completed internally at Samsung Electronics, and it will be officially introduced starting from the first half of next year. Simultaneously collaborating with electronic design automation (EDA) companies to design new photomasks, including a non-linear (Curvilinear) mask circuit drawing method for High NA EUV, to improve the clarity of printed circuits on wafers. This collaboration involves companies such as Synopsys, a global leader in semiconductor EDA tools.
In addition to ASML, Laser Technologies, and Synopsys, Samsung Electronics is expected to collaborate with photoresist companies such as JSR and tracking equipment "Number One" Tokyo Electronics, which applies photoresist onto wafers, to prepare for the arrival of the High NA era. It is reported that Samsung Electronics is preparing to officially commercialize High NA in 2027 through such ecosystem construction work.
Samsung Electronics' wafer foundry business is standing at a critical crossroads, and its survival seems to depend entirely on the mass production of 2nm chip process technology. This is not only a technological leap, but also the key to whether Samsung's wafer foundry business can be revitalized.
However, the path to success is never smooth sailing. In the process of advancing its technological blueprint, Samsung has to face a series of severe challenges:
Firstly, there are technical challenges, and the yield issue of advanced processes has always been a Damocles sword hanging over semiconductor manufacturers. Samsung's 3-nanometer process failed to meet mass production standards due to low yield and questionable reliability, undoubtedly casting a shadow over its wafer foundry business.
Even worse, the market response did not go as Samsung had hoped. Despite Samsung's efforts to enhance its technological capabilities, the reliability and competitiveness of its wafer foundry business are still lacking in the minds of customers. Facing strong competitors such as TSMC, Samsung seems powerless in attracting high-end customers. This market dilemma further exacerbates Samsung's financial pressure. It is estimated that Samsung's wafer foundry business may lose hundreds of billions of Korean won in the third quarter, which is a major test for Samsung's management.
Faced with internal and external troubles, Samsung's senior management had to make a series of difficult decisions.
According to research firm Statista, despite Samsung's efforts to challenge TSMC over the years, Samsung's market share in the OEM manufacturing market has decreased by 8 percentage points in the past five years. In the second quarter of 2024, Samsung held 11.5% of the global OEM market share, while TSMC held 62.3% of the market share.
The decline in Samsung's market share highlights the technological challenges it faces in mastering advanced chip manufacturing technology. It has invested too much in its foundry business, which has resulted in insufficient customer acquisition and unstable production processes, further leading to Samsung's current crisis.
Overall, the semiconductor industry itself is a field of rapid technological iteration and market volatility, and Samsung must maintain sufficient sensitivity to cope with future changes. How to find a suitable path for its own development in the rapidly changing market is an urgent problem that Samsung needs to solve.
4、 TSMC is' orderly 'and wins the' negotiation game '
As a leader in the semiconductor industry, TSMC has made remarkable achievements in the past 30 years. Over the years, facing the enormous challenges and pressures brought by Samsung and Intel, TSMC has assessed the situation and taken effective measures, becoming the world's largest chip foundry enterprise.
Nowadays, even though leading semiconductor companies in the industry are competing for High NA EUV equipment, TSMC seems not eager to join this ranks.
Previously, when it came to when to introduce High NA EUV equipment, Zhang Xiaoqiang, Senior Vice President and Deputy Co Operating Director of TSMC, revealed in an interview with the outside world that TSMC is confident and will not blindly expand its procurement due to competitors' early purchase of equipment. It will still adopt a steady and steady approach to layout advanced processes and meet challenges.
However, recent reports suggest that TSMC is expected to receive the first batch of the world's most advanced chip manufacturing equipment, the High NA EUV lithography machine, from ASML by the end of this year. This news marks another important step for TSMC in the semiconductor manufacturing field.
It is interesting that TSMC initially refused to accept High NA EUV due to cost reasons. Earlier, TSMC CEO Wei Zhe Jia was absent from the "TSMC Technology Seminar 2024" and instead went to ASML headquarters in Eindhoven, Netherlands to discuss equipment.
Now it seems a bit like TSMC's negotiation game, perhaps fighting for better conditions with ASML.
It is rumored that Wei Zhe's family personally negotiated with ASML and reached an agreement to reduce the overall price by nearly 20% by combining the purchase of new equipment and the sale of old models. ASML agreed to sell High NA EUV equipment to TSMC at a discounted price mainly because TSMC is its super VIP customer, and ASML has made significant concessions. This concession includes full assistance to TSMC in machine installation, calibration, and technical support to accelerate the launch timeline.
Therefore, TSMC's attitude has undergone a dramatic change, shifting from hesitating about the price of the new High NA EUV lithography machine to actively seeking cooperation.
It is reported that TSMC is expected to install a new High NA EUV lithography machine in its R&D center near its headquarters in Hsinchu, Taiwan, China, this quarter. In the short term, TSMC plans to primarily use High NA EUV lithography machines for research and development, in order to develop the necessary infrastructure and pattern solutions for customers to drive innovation.
According to ASML's roadmap, the first generation High NA EUV lithography machine TWINSCAN EXE: 5000 may mainly be used by wafer manufacturers for related experiments and testing, so that companies can better understand the use of High NA EUV equipment and gain valuable experience. The actual mass production will depend on the TWINSCAN EXE: 5200 shipped by the end of 2024.
TSMC's upcoming N2 (2 nanometer level) and A16 (1.6 nanometer level) process technologies will rely entirely on traditional EUV equipment, whose optical components have a NA of 0.33. The industry expects TSMC to use 0.55 NA EUV tools in its A14 (1.4 nanometer level) process technology as early as 2028 or later, although the company has not yet officially confirmed this.
Compared with its competitors, TSMC can accumulate valuable experience data and optimize processes through continuous production practice, making it difficult to build a virtuous cycle system of "order driven technology iteration re order". In other words, TSMC has an extremely large group of high-quality customers to assist them in debugging various device bugs, which is exactly what Samsung and Intel lack.
1. TSMC Layout Strategy: No Treasure Left Behind
The author previously mentioned that from the perspective of the layout strategy and approach of the three giants, TSMC is often considered a conservative technology developer who tends to ensure the maturity and reliability of new technologies before deploying them, rather than rushing to bring them to the market.
From the actual market performance, TSMC's move can reduce the risk of technological failure, improve its chip production and quality, and ensure customer satisfaction.
For example, Samsung began using EUV lithography machines in its 7nm process in 2018, but TSMC chose to wait. It was not until the stability and maturity of EUV tools were confirmed, and related issues were resolved or at least identified, that EUV began to be used in the N7+process in 2019.
Since then, in the transition from FinFET to GAA process, TSMC has still re operated this mode. With technological advantages and accumulation in process leadership and production yield, we are fully capable of competing with Samsung, which adopts GAA technology architecture.
TSMC is still slow to invest in BSPDN backside power supply technology, which Intel is heavily betting on, and plans to add it to the N2P, which will not begin mass production until the end of 2026.
This cautious approach helps TSMC ensure the stability and predictability of its process technology, thereby providing high-quality chips to its customers.
However, in the field of advanced packaging, TSMC has changed its usual practice and actively laid out to be the first to land. With the combination of advanced processes and advanced packaging, it has brought a new wave of growth.
Under this balanced strategy, TSMC's strategic philosophy and unique vision are fully highlighted. In the blue ocean track it has set its sights on, TSMC has always dared to take the lead. Whether it was leading the way in trial production of 16nm FinFET process technology ten years ago, surpassing Intel, or deploying advanced packaging five years ago to reap the benefits of AI today, TSMC has brilliantly demonstrated the so-called 'phoenix without treasure'.
In the advanced process field where TSMC maintains a significant advantage, even in the face of the increasing pressure from Samsung and Intel, TSMC did not choose to be blindly aggressive. Instead, it adopted a strategy of observing first and then following suit. After making sufficient preparations and planning, TSMC followed suit step by step, relying on its strong production capacity, yield, and customer base advantages to maintain an unbeatable position.
5、 SK Hynix launches High NA EUV, betting on HBM
In addition, in the storage field, SK Hynix's first High NA EUV lithography machine "EXE: 5200" is expected to be introduced in 2026 to support the mass production of its advanced DRAM products. This measure further demonstrates the semiconductor industry's continuous pursuit and investment in advanced process technology.
In 2023, SK Hynix formed a separate team dedicated to developing High NA EUV technology.
As a giant in the HBM field, SK Hynix is continuously increasing its internal investment in the development of High NA EUV technology and actively expanding its related research and development team. Although the specific wafer fab location and additional investment direction for equipment installation have not been publicly disclosed, the industry generally expects that this technology will be quickly applied to the large-scale production of 0A (single digit nanometer) DRAM to further enhance product competitiveness.
Write at the end
The world below 7nm is a paradise for alternative adventurers, and the competitive relationship between TSMC, Samsung, and Intel has become increasingly subtle.
According to the "Rayleigh formula" of lithography machines, the improvement of lithography processes has been comprehensively advancing in multiple dimensions over the past few decades, continuously optimizing exposure wavelengths, numerical apertures, and process factors. However, the current reduction in exposure wavelength and increase in numerical aperture (NA) have approached the limits of physical and cost considerations.
Nowadays, the limit of Moore's Law is getting closer and closer, and the industry has almost reached the end of the tunnel. 2nm and the next few generations of process nodes will be the key for chip giants to seize the market.
The competition between semiconductor giants such as TSMC, Intel, and Samsung is heating up globally, as they compete to obtain High NA EUV equipment for processes below 2nm. Intel was the first to acquire the device in December 2023, followed closely by TSMC in the third quarter of 2024. Although Samsung's orders came late, achieving stable production may be a key factor in determining its leading position in the industry.
But the competition in chip foundry is not only a competition in technology, but also a comprehensive competition in various aspects such as customers, brands, yield, and production capacity. I don't know if Intel and Samsung can seize the opportunity to rise again in the dawn of the new market. If it fails, TSMC will continue to dominate.